LIBRARY ieee;
USE ieee.std_logic_1164.all;

ENTITY decoder IS
	PORT
	(
		i	:	IN STD_LOGIC_VECTOR(127 DOWNTO 0);
		srcPort : OUT STD_LOGIC_VECTOR(1 downto 0);
        srcAddress, desAddress: OUT STD_LOGIC_VECTOR(47 downto 0);
        done	:	OUT STD_LOGIC
	);
END decoder;

ARCHITECTURE arch OF decoder IS
BEGIN

	srcAddress <= i(97 downto 50);
	srcPort <= i(49 downto 48);
	desAddress <= i(47 downto 0);
	done <= i(127);

END arch;